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9
10 After obtaining the Edge number for the respective signal, begin the tDQSL measurement by
11 Assign marker A for the rising edge of the clock signal while marker B for the falling edge of the
12 Measure delta of marker A and marker B and this will be the test result.
13 Compare the test result against the compliance test limit.
Test References
See Table 11 - Electrical Characteristics and AC Timing, in the JEDEC Standard JESD79E.
DDR1 Compliance Testing Methods of Implementation
Search for the DQS preamble towards the left from the point where the Read cycle was previously
captured. The for loops, TEdge and Delta Time are used to search the preamble.
Once the preamble is located, call the "BinaryEdgeNormal" function to obtain the Edge number.
This Edge number will be used to locate the point of interest on the specific signal.
using the Nwidth function to find any rising edge of the data strobe signal and measure the
nwidth for every single bit in the captured data burst.
clock signal.
Data Strobe Timing (DST) Tests
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