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11
Advanced Debug Mode Clock Tests
Cumulative Error - tERR(n per) - Test Method of Implementation
This Cumulative Error (across "n" cycles) test is applicable to the Rising Edge Measurement as well
as the Falling Edge Measurement. The purpose of this test is to measure the difference between a
measured clock period and the average clock period across multiple cycles of the clock.
Signals of Interest
Based on the test definition:
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Signals required to perform the test on the oscilloscope:
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Measurement Algorithm
Example input test signal: Frequency: 1 KHz, Number of cycles acquired: 202.
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Clock Signal
Clock Signal - CK is required to perform pre-test to verify the DUT speed against user's speed
grade selection
tERR(2per) is similar to tJIT(per), except it makes a small 2-cycle window inside the big 200 cycle
window and compares the average of the small window with the average of the big window.
Check the results for the smallest and largest values (worst case values).
Compare the results against the compliance test limits.
tERR(3per) is the same as tERR(2per) except the small window size is 3 periods wide. tERR(4per)
uses small window size of 4 periods and tERR(5per) uses 5 periods.
tERR(6-10per) executes tERR(6per), tERR(7per), tERR(8per), tERR(9per) and tERR(10per),
combines all the measurement results together into one big pool and checks for the smallest and
largest value.
tERR(11-50per) does the same for tERR(11per) through tERR(50per).
DDR1 Compliance Testing Methods of Implementation
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