Signals Of Interest - Keysight U7233A Testing Notes

Ddr1 compliance test application
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Figure 40

Signals of Interest

Based on the test definition (Read cycle only):
Signals required to perform the test on the oscilloscope:
Optional signal required to separate the signals for the different Ranks:
DDR1 Compliance Testing Methods of Implementation
tDQSCK in Infiniium oscilloscope
Data Strobe Signal (DQS as Pin Under Test Signal)
Clock Signal (CK as Reference Signal)
Data Strobe Signal (DQS as Pin Under Test Signal)
Data Signal (DQ as Supporting Signal)
Clock Signal (CK as Reference Signal)
Chip Select Signal (CS as additional signal, which requires an additional channel)
Clock Timing (CT) Tests
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U7233b

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