Quick Reference - Keysight U7233A Testing Notes

Ddr1 compliance test application
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Quick Reference

Table 1
Cycles and Signals
NOTE: 1 = Single Ended probing; 2 = Differential probing; 3 = 2 x Single Ended probing
TEST
Cycle
Read Write DQ DQS CK ADD Ctrl
SlewR
SlewF
VIH(ac)
VIH(dc)
VIL(ac)
VIL(dc)
VOH(ac)
VOL(ac)
AC
Overshoot
AC
Undershoot
VID(ac)
VIX(ac)
tAC
tDQSCK
tCK(avg)
tCH(avg)
tCL(avg)
tHZ(DQ)
tHZ(DQS)
tLZ(DQS)
tLZ(DQ)
tDQSQ
tQH
TEST
Cycle
DDR1 Compliance Testing Methods of Implementation
Based on Test Definition
Based on Test Definition
Required to Perform on Scope
Data
DQ DQS CK ADD Ctrl
Mask
Ctrl
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
Required to Perform on Scope
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
3
3
3
3
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
Opt.
Data
CS#
Mask
Ctrl
2
2
2
2
2
2
2
2
2
Opt.
3

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U7233b

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