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Table 64
Configuration Option
Stop on error
Signal Threshold setting by
percentage
VDD
VDDQ
Vref
Vih(DC)
Vih(AC)
Vil(DC)
Vil(AC)
Ad vanced Debug Mode
Pin Under Test, PUT
PUT Source
Time-out
Trigger Level
Upper Level
Hysteresis
Lower Level
DDR1 Compliance Testing Methods of Implementation
Test Configuration Options
Description
Enabling this error message will allow error message to prompt whenever criteria is not met.
Disabling this option will allow the system to bypass all the error messages that could occur
and continue to the next test. This option is suitable for long hours multiple trial.
This option allow user to define the Upper and Lower threshold of the signal by percentage.
Input supply voltage value.
Input supply voltage for data output.
Input reference voltage value.
Input voltage high value (direct current).
Input voltage high value (alternating current).
Input voltage low value (direct current).
Input voltage low value (alternating current).
Identifies the Pin Under Test for High/Low State Ringing tests
Identifies the source of the PUT for High-Low State Ringing tests.
Identifies the time-out value to be used for High-Low State Ringing Test.
Sets the rising edge voltage level to trigger on for all High-Low State Ringing Test.
Identifies the upper threshold level to be used for the ringing tests.
Identifies the hysteresis value to be used for the ringing test.
Identifies the lower threshold level to be used for the ringing tests.
Advanced Debug Mode High-Low State Ringing Tests
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