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Half Period Jitter - tJIT(duty) - Test Method of Implementation
The Half Period Jitter tJIT(duty) can be divided into tJIT(CH) Jitter Average High and tJIT(LH) Jitter
Average Low. The tJIT(CH) Jitter Average High Measurement measures between a positive pulse
width of a cycle in the waveform, and the average positive pulse width of all cycles in a 200
consecutive cycle window. tJIT(LH) Jitter Average Low Measurement measures between a negative
pulse width of a cycle in the waveform and the average negative pulse width of all cycles in a 200
consecutive cycle window.
Signals of Interest
Based on the test definition:
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Signals required to perform the test on the oscilloscope:
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Measurement Algorithm
Example input test signal: Frequency: 1 KHz, Number of cycles acquired: 202.
tJIT(CH)
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tJIT(CH)
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DDR1 Compliance Testing Methods of Implementation
Clock Signal
Clock Signal - CK is required to perform pre-test to verify the DUT speed against user's speed
grade selection
This measurement measures the difference between every high pulse width inside a 200 cycle
window with the average of the whole window.
Measure the difference between high pulse width, and the average. Save the answer as the
measurement result.
Compare the high pulse width with the new average.
Check the results for the smallest and largest values (worst case values).
Compare the test results against the compliance test limits.
This measurement is similar to tJIT(CH) above except, instead of using high pulse widths, it uses
low pulse widths for testing comparison.
Advanced Debug Mode Clock Tests
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