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10 Follow the DDR1 Test application's task flow to set up the configuration options (see
Table 63
Configuration Option
Stop on error
Signal Threshold setting by
percentage
VDD
VDDQ
Vref
Vih(dc)
Vih(ac)
Vil(dc)
Vil(ac)
Waveform Source
Use Recommended Memory
Depth
Use Fixed Sampling Rate and
Bandwidth
Worst Case Tracking
Mark Worst Case Cycle
terr(nper) SubWindow Range
terr(nper) Minimum N Width
Value
terr(nper) Maximum N Width
Value
DDR1 Compliance Testing Methods of Implementation
the tests and view the tests results.
Test Configuration Options
Description
Enabling this error message will allow error message to prompt whenever criteria is not met.
Disabling this option will allow the system to bypass all the error messages that could occur
and continue to the next test. This option is suitable for long hours multiple trial.
This option allow user to define the Upper and Lower threshold of the signal by percentage.
Input supply voltage value.
Input supply voltage for data output.
Input reference voltage value.
Input voltage high value (direct current).
Input voltage high value (alternating current).
Input voltage low value (direct current).
Input voltage low value (alternating current).
Identifies the source of the data to be analyzed.
Sets the Memory Depth to the maximum recommended value: 2 Mpts (DSO80000 series) or 1
Mpts (DSO548xx series). Select "No" if you plan to manually select the memory depth.
Sets the Sampling Rate to 20 GSa and Bandwidth to AUTO. Select "No" if you plan to manually
select sampling rate or bandwidth settings.
Places markers around the worst case cycles (test-dependent). Slows runtime performance.
Sets the lower bound (inclusive) of the inner sliding window for the terr(nper) series.
Sets the upper bound (inclusive) of the inner sliding window for the terr(nper) series.
Advanced Debug Mode Clock Tests
Table
11
63), run
153
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