Figure 1.4 Mb89620 Series Block Diagram - Fujitsu F2MC-8L MB89620 Series Hardware Manual

8-bit microcontroller
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4
1.
MB89620 Series Block Diagram
Figure 1.4 shows the block diagram of the MB89620 series.
n MB89620 Series Block Diagram
P00/AD0
to P07/AD7
P10/A08
to P17/A15
MOD0
MOD1
P27/ALE
P26/RD
P25/WR
P24/CLK
P23/RDY
P22/HRQ
P21/HAK
P20/BUFC
*: CLKO output function (MB89628R, MB89629R, and MB89P629 only)
8
CHAPTER 1 OVERVIEW
X0
Oscillator
X1
Clock controller
Reset circuit
RST
(Watchdog timer)
CMOS I/O port
8
8
External bus
interface
(External bus
mode)
CMOS output port
RAM
F
2
MC-8L
CPU
ROM
Other pins
× 2
V
, V
CC
SS

Figure 1.4 MB89620 Series Block Diagram

20-bit timebase
timer
8-bit PWM timer
8-bit pulse width
count timer
16-bit timer/counter
8-bit serial I/O-1
CMOS I/O port
8-bit serial I/O-2
Buzzer output
N-ch open-drain I/O port
N-ch open-drain output port
8
8-bit A/D converter
4
External interrupt
(wake-up)
Input-only port
P37/PTO
P36/WTO
P35/PWC
P34/EC
P33/SI1
P32/SO1
P31/SCK1
P30/ADST
/(CLKO) *
P47/SI2
P46/SO2
P45/SCK2
P44/BZ
4
P40 to P43
8
P50/AN0
to P57/AN7
AVR
AV
CC
AV
SS
4
P60/INT0
to P63/INT3
P64
MB89620 series

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