Component Features; Graphics Memory Controller Hub (Gmch); Figure 2. Gmch Block Diagram - Intel 815 Design Manual

Introduction
1.3.2

Component Features

Figure 2. GMCH Block Diagram

GPA
or AGP
2X/4X
card
1.3.2.1

Graphics Memory Controller Hub (GMCH)

Processor/System Bus Support
Optimized for Intel
frequency
Support for Intel
Supports 32-bit AGTL or AGTL+ bus addressing
Supports uniprocessor systems
Utilizes AGTL and AGTL+ bus driver technology (gated AGTL/AGTL+ receivers for
reduced power)
Integrated DRAM controller
32 MB to 512 MB using 16-Mb/64-Mb/128-Mb technology
Supports up to three double-sided DIMMS (six rows)
100 MHz, 133 MHz SDRAM interface
64-bit data interface
Standard Synchronous DRAM (SDRAM) support (x-1-1-1 access)
Supports only 3.3V DIMM DRAM configurations
No registered DIMM support
Support for symmetrical and asymmetrical DRAM addressing
Support for x8, x16 DRAM device width
Refresh mechanism: CAS-before-RAS only
Support for DIMM serial PD (presence detect) scheme via SMbus interface
STR power management support via self-refresh mode using CKE
18
System bus (66/100/133 MHz)
Processor I/F
AGP I/F
Data
stream
control &
Local memory I/F dispatch
Hub I/F
Hub
® ® III processors (CPUID = 068xh) at 133 MHz system bus
Pentium
®
Celeron™ processors (CPUID = 068xh); 66 MHz system bus
System
memory I/F
Primary display
Overlay RAMDAC
H/W cursor FP / TVout
3D pipeline
2D (blit engine)
Internal graphics
®
Intel 815 Chipset Platform Design Guide
R
SDRAM
100/133
MHz, 64 bit
Monitor
Digital
video out
comp_blk_1