Operation As External Event Counter (8 Bits) - NEC V850ES/SA2 UPD703201 Manual

7.3.2

Operation as external event counter (8 bits)

The external event counter counts the number of clock pulses input to the TIn pin from an external source by using
8-bit timer counter n (TMn).
Each time the valid edge specified by timer clock selection register n (TCLn) is input to the TIn pin, the TMn
register is incremented. Either the rising edge or the falling edge can be specified as the valid edge.
When the count value of the TMn register matches the value of 8-bit timer compare register n (CRn), the TMn
register is cleared to 0 and an interrupt request signal (INTTMn) is generated.
Setting method
<1> Set each register.
• TCLn register: Selects the TIn input edge.
• CRn register:
• TMCn register: Stops count operation, selects the mode in which clear & start occurs on a match
<2> When the TCEn bit of the TMCn register is set to 1, the counter counts the number of pulses input from
TIn.
<3> When the values of the TMn register and CRn register match, INTTMn is generated (TMn register is
cleared to 00H).
<4> Then, INTTMn is generated each time the values of the TMn register and CRn register match.
INTTMn is generated when the valid edge of TIn is input N + 1 times: N = 00 to FFH
Caution During external event counter operation, do not rewrite the value of the CRn register.
Remark n = 2 to 5
Figure 7-19. Timing of External Event Counter Operation (with Rising Edge Specified)
TIn
TMn count value
Count start
CRn
TCEn
INTTMn
Remark n = 2 to 5
252
CHAPTER 7 TIMER/COUNTER FUNCTION
Falling edge of TIn pin → TLCn = 00H
Rising edge of TIn pin → TCLn = 01H
Compare value (N)
between the TMn register and CRn register, disables timer output F/F inversion
operation, and disables timer output.
(TMCn register = 0000xx00B, ×: don't care)
00H 01H 02H 03H 04H
Preliminary User's Manual U15905EJ1V0UD
05H N – 1 N 00H
N
01H 02H 03H