Initial Reset; Oscillation Detection Circuit; Reset Terminal (Reset); Simultaneous High Input To Input Ports (K00-K03) - Epson S1C60N03 Technical Manual

Cmos 4-bit single chip microcomputer
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CHAPTER 2: POWER SUPPLY AND INITIAL RESET

2.2 Initial Reset

To initialize the S1C60N03 Series circuits, an initial reset must be executed. There are three ways of doing this.
(1) Initial reset by the oscillation detection circuit (Note)
(2) External initial reset via the RESET terminal
(3) External initial reset by simultaneous high input to K00–K03 (depending on mask option)
Figure 2.2.1 shows the configuration of the initial reset circuit.
OSC1
OSC2
K00
K01
K02
K03
RESET
Note: Be sure to use reset function (2) or (3) at power-on because the initial reset function by the
oscillation detection circuit (1) may not operate normally depending on the power-on procedure.

2.2.1 Oscillation detection circuit

The oscillation detection circuit outputs the initial reset signal at power-on until the oscillation circuit
starts oscillating, or when the oscillation circuit stops oscillating for some reason.
However, use the following reset functions at power-on because the initial reset function by the oscilla-
tion detection circuit may not operate normally depending on the power-on procedure.

2.2.2 Reset terminal (RESET)

An initial reset can be invoked externally by making the reset terminal high. This high level must be
maintained for at least 5 msec (when oscillating frequency fosc = 32 kHz), because the initial reset circuit
contains a noise rejection circuit. When the reset terminal goes low the CPU begins to operate.
2.2.3 Simultaneous high input to input ports (K00–K03)
Another way of invoking an initial reset externally is to input a high signal simultaneously to the input
ports (K00–K03) selected with the mask option. The specified input port terminals must be kept high for
at least 4 sec (when oscillating frequency fosc = 32 kHz), because of the noise rejection circuit. Table
2.2.3.1 shows the combinations of input ports (K00–K03) that can be selected with the mask option.
When, for instance, mask option D (K00*K01*K02*K03) is selected, an initial reset is executed when the
signals input to the four ports K00–K03 are all high at the same time.
When this function is used, make sure that the specified ports do not go high at the same time during
normal operation.
6
OSC1
Oscillation
circuit
Oscillation
detection
circuit
Vss
rejection
Vss
Fig. 2.2.1 Configuration of initial reset circuit
Table 2.2.3.1 Input port combinations
A
Not used
B
K00*K01
C
K00*K01*K02
D
K00*K01*K02*K03
EPSON
Noise
Noise
rejection
circuit
circuit
Initial
reset
S1C60N03 TECHNICAL MANUAL

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