Peripheral Circuits And Operation; Memory Map - Epson S1C63454 Technical Manual

CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Memory Map)
4 P
CHAPTER
The peripheral circuits of S1C63454 (timer, I/O, etc.) are interfaced with the CPU in the memory
mapped I/O method. Thus, all the peripheral circuits can be controlled by accessing the I/O memory on
the memory map using the memory operation instructions. The following sections explain the detailed
operation of each peripheral circuit.

4.1 Memory Map

The S1C63454 data memory consists of 1,024-word RAM, 2,048-word data ROM, 680-bit display memory
and 53-word peripheral I/O memory. Figure 4.1.1 shows the overall memory map of the S1C63454, and
Tables 4.1.1(a)–(d) the peripheral circuits' (I/O space) memory maps.
0000H
0400H
8000H
8800H
F000H
FF00H
FFFFH
Note: Memory is not implemented in unused areas within the memory map. Further, some non-imple-
mentation areas and unused (access prohibition) areas exist in the display memory area and the
peripheral I/O area. If the program that accesses these areas is generated, its operation cannot be
guaranteed. Refer to Section 4.7.5, "Display memory", for the display memory, and the I/O memory
maps shown in Tables 4.1.1 (a)–(d) for the peripheral I/O area.
14
ERIPHERAL
RAM area
Unused area
Data ROM area
Unused area
I/O memory area
Fig. 4.1.1 Memory map
EPSON
C
IRCUITS AND
F000H
Display memory area
F24FH
Unused area
FF00H
Peripheral I/O area
FF80H
Unused area
FFC0H
Peripheral I/O area
FFFFH
O
PERATION
S1C63454 TECHNICAL MANUAL