Specifications; Baud Rate; Ram; Eprom - HP M2350A Service Manual

Understanding the Computer Module
The Function Cards
Specifications
CPU. 68HCOOO @ 1oMHz
Baud Rate.
475KBaud
RAM.
64KByte
EPROM.
64KByte
BDLC
link. Complies with RS-485 and STRIP specification.
Internal Connector. 96 way
ABC.
External Connector.
Molex Semconn receptacle key option 2.
Figure 2-15. BDLC Interface C+rd Block Diagram
The HDLC Interface is based around a 68000 microprocessor and an HDLC controller (HSCX),
which is controlled by the CPU in interrupt mode.
The HSCX can control two identical independent synchronous serial
channels
(A and B). These
channels are built-up using transmit and receive FIFOs and control registers which can be
accessed asynchronously by the processor without waitstates. Only channel B is used for the
HDLC link, and is connected to the operational port. The inverted RTS output of the HSCX
controls the direction of the HDLC driver.
2.39