Buffered SRAM .............................
...............................
.................................
PFAJL and SYS-RESET ..........................
summary .................................
Specifications ..............................
CPU .................................
outputs ................................
...................
.............................
summary .................................
CPU .................................
outputs ................................
2-12
2-12
2-12
2-12
2-13
2-13
2-13
2-13
2-13
2-14
2-14
2-14
2-15
2-15
2-15
2-15
2-15
2-16
2-16
2-16
2-16
2-16
2-16
2-16
2-16
2-16
2-16
2-16
2-16
2-16
2-16
2-16
2-16
2-18
2-18
2-18
2-18
2-19
2-19
2-19
2-19
2-19
2-19
2-19
2-19
2-19
2-19
2-19
2-19
2-19
2-19
2-19
2-19
2-22
2-22
Contents-3