External Clock Synchronization Overview For Acx Series Routers; Automatic Clock Selection - Juniper ACX1000 Configuration Manual

ACX Series Universal Access Router Configuration Guide
Related
Documentation

External Clock Synchronization Overview for ACX Series Routers

Automatic Clock Selection

226
NOTE: ACX500 routers do not support 10 MHz in and out. ACX500 routers
supports GPS input through SubMiniature version A (SMA) connector.
ACX500 routers contain integrated GPS receiver, pulse-per-second (PPS) in and out,
and Gigabit Ethernet ports (RJ45 and SFP).
Synchronous Ethernet (SyncE) is supported based on the ITU G.8261, G.8262, and
G.8264 specifications with line timing for
Synchronous Ethernet is a key requirement for circuit (emulation) services and mobile
radio access technologies. Synchronous Ethernet supports sourcing and transfer of
frequency for synchronization purposes for both wireless and wireline services and is
primarily used for mobile backhaul and converged transport.
The Precision Time Protocol (PTP) 1588v2—compliant ordinary slave clock estimates
the time offset from the PTP master clock and tries to align its own time and frequency
with that of the master. PTP supports sourcing, transfer of frequency, and phase
synchronization. Also, PTP can be used for mobile backhaul when phase synchronization
is required, such as in Long Term Evolution-Time Division Duplex (LTE-TDD)
infrastructures.
Global Positioning System (GPS) and the ACX Series Routers on page 306
Understanding Interfaces on ACX Series Universal Access Routers on page 94
Synchronous Ethernet Overview on the ACX Series Universal Access Routers on page 107
IEEE 1588v2 Precision Timing Protocol (PTP) on ACX Series Universal Access Routers
on page 237
The ACX Series Universal Access routers support external clock synchronization and
automatic clock selection for Synchronous Ethernet, T1 or E1 line timing sources, and
external inputs. Configuring external clock synchronization and automatic clock selection
requires making clock selection, quality level (QL), and priority considerations. The clock
source selection algorithm is used to pick the two best upstream clock sources from
among all the various sources, based on system configuration and execution criteria such
as QL, priority, and hardware restrictions.
With automatic clock selection, the system chooses up to two best upstream clock
sources. The system then uses the clock recovered from one of the sources to lock the
chassis clock. If an upstream clock with acceptable good quality is not available or if the
system is configured in free-run mode, the system uses the internal oscillator. The
following automatic clock selection features are supported for Synchronous Ethernet,
T1 or E1 line timing sources, and external inputs:
and ports.
ge xe
Copyright © 2017, Juniper Networks, Inc.