Irq Sense Control Registers H And L (Iscrh, Iscrl) - Hitachi H8S/2338 Series Hardware Manual

3.2.4

IRQ Sense Control Registers H and L (ISCRH, ISCRL)

ISCRH
Bit : 15
IRQ7SCB IRQ7SCA IRQ6SCB IRQ6SCA IRQ5SCB IRQ5SCA IRQ4SCB IRQ4SCA
Initial value :
R/W : R/W
ISCRL
Bit :
IRQ3SCB IRQ3SCA IRQ2SCB IRQ2SCA IRQ1SCB IRQ1SCA IRQ0SCB IRQ0SCA
Initial value :
R/W : R/W
ISCR (composed of ISCRH and ISCRL) is a 16-bit readable/writable register that selects rising
edge, falling edge, or both edge detection, or level sensing, for the input at pins IRQ7 to IRQ0.
ISCR is initialized to H'0000 by a reset and in hardware standby mode.
Bits 15 to 0: IRQ7 Sense Control A and B (IRQ7SCA, IRQ7SCB) to IRQ0 Sense Control A and
B (IRQ0SCA, IRQ0SCB)
Bits 15 to 0
IRQ7SCB to IRQ7SCA to
IRQ0SCB IRQ0SCA
0 0
1
1 0
1
14 13
0 0
R/W R/W
7 6
0 0
R/W R/W
Description
Interrupt request generated at IRQ7 to IRQ0 input low level
Interrupt request generated at falling edge of IRQ7 to IRQ0 input
Interrupt request generated at rising edge of IRQ7 to IRQ0 input
Interrupt request generated at both falling and rising edges of
IRQ7 to IRQ0 input
12 11
0 0
R/W R/W
5 4
0 0
R/W R/W
10
0 0
R/W R/W
3 2
0 0
R/W R/W
9 8
0 0
R/W
1 0
0 0
R/W
(Initial value)
23