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R8C/18 Group, R8C/19 Group
10.4
Power Control
There are three power control modes. All modes other than wait mode and stop mode are referred to as
standard operating mode.
10.4.1
Standard Operating Mode
Standard operating mode is further separated into four modes.
In standard operating mode, the CPU clock and the peripheral function clock are supplied to operate
the CPU and the peripheral function clocks. Power consumption control is enabled by controlling the
CPU clock frequency. The higher the CPU clock frequency, the more processing power increases.
The lower the CPU clock frequency, the more power consumption decreases. When unnecessary
oscillator circuits stop, power consumption is further reduced.
Before the clock sources for the CPU clock can be switched over, the new clock source needs to be
oscillating and stable. If the new clock source is the main clock, allow sufficient wait time in a
program until oscillation is stabilized before exiting.
Table 10.2
Settings and Modes of Clock Associated Bits
Modes
High-speed mode
Medium-
Divide-by-2
speed
Divide-by-4
mode
Divide-by-8
Divide-by-16
High-speed,
No division
low-speed
Divide-by-2
on-chip
Divide-by-4
oscillator
Divide-by-8
(1)
mode
Divide-by-16
NOTE:
1. The low-speed on-chip oscillator is used as the on-chip oscillator clock when the CM14 bit in the
CM1 register is set to 0 (low-speed on-chip oscillator on) and the HRA01 bit in the HRA0 register is
set to 0. The high-speed on-chip oscillator is used as the on-chip oscillator clock when the HRA00
bit in the HRA0 register is set to 1 (high-speed on-chip oscillator A on) and the HRA01 bit in the
HRA0 register is set to 1.
Rev.1.30
Apr 14, 2006
REJ09B0222-0130
OCD Register
OCD2
CM17, CM16
0
0
0
0
0
1
1
1
1
1
Page 63 of 233
CM1
Register
CM13
00b
1
01b
1
10b
1
−
1
11b
1
−
00b
−
01b
−
10b
−
−
−
11b
10. Clock Generation Circuit
CM0
Register
CM06
CM05
0
0
0
0
0
0
1
0
0
0
−
0
−
0
−
0
−
1
−
0
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