Notes On Flash Memory Version; Cpu Rewrite Mode - Renesas R8C/18 Series Hardware Manual

R8C/18 Group, R8C/19 Group
19.6

Notes on Flash Memory Version

19.6.1

CPU Rewrite Mode

19.6.1.1 Operating Speed
Before entering CPU rewrite mode (EW0 mode), select 5 MHz or below for the CPU clock using the
CM06 bit in the CM0 register and bits CM16 to CM17 in the CM1 register. This does note apply to
EW1 mode.
19.6.1.2 Prohibited Instructions
The following instructions cannot be used in EW0 mode because they reference data in the flash
memory: UND, INTO, and BRK.
19.6.1.3 Interrupts
Table 19.1 lists the EW0 Mode Interrupts and Table 19.2 lists the EW1 Mode Interrupts.
Table 19.1 EW0 Mode Interrupts
Mode Status
EW0 During auto-erasure
Auto-programming
NOTES:
1. Do not use the address match interrupt while a command is being executed because the vector of
the address match interrupt is allocated in ROM.
2. Do not use a non-maskable interrupt while block 0 is being automatically erased because the fixed
vector is allocated in block 0.
Rev.1.30 Apr 14, 2006
REJ09B0222-0130
When Maskable Interrupt
Request is Acknowledged
Any interrupt can be used
by allocating a vector in
RAM
Page 225 of 233
When Watchdog Timer, Oscillation Stop
Detection and Voltage Monitor 2 Interrupt
Request is Acknowledged
Once an interrupt request is acknowledged,
auto-programming or auto-erasure is forcibly
stopped immediately and the flash memory is
reset. Interrupt handing starts after the fixed
period and the flash memory restarts. Since
the block during auto-erasure or the address
during auto-programming is forcibly stopped,
the normal value may not be read. Execute
auto-erasure again and ensure it completes
normally.
Since the watchdog timer does not stop during
the command operation, interrupt requests
may be generated. Reset the watchdog timer
regularly.
19. Usage Notes