Renesas R8C/18 Series Hardware Manual page 48

R8C/18 Group, R8C/19 Group
Port Pi Direction Register (i = 1, 3, 4)
b7 b6 b5 b4 b3 b2 b1 b0
NOTES:
1. Bits PD3_0 to PD3_2, and PD3_6 in the PD3 register are unavailable on this MCU.
If it is necessary to set bits PD3_0 to PD3_2, and PD3_6, set to 0 (input mode). When read, the content is 0.
2. Bits PD4_0 to PD4_4, PD4_6, and PD4_7 in the PD4 register are unavailable on this MCU. If it is necessary to set bits
PD4_0 to PD4_4, PD4_6, and PD4_7, set to 0 (input mode). When read, the content is 0.
Figure 6.5 Registers PD1, PD3, and PD4
Port Pi Register (i = 1, 3, 4)
b7 b6 b5 b4 b3 b2 b1 b0
NOTES:
1. Bits P3_0 to P3_2, and P3_6 in the P3 register are unavailable on this MCU.
If it is necessary to set bits P3_0 to P3_2, and P3_6, set to 0 ("L" level). When read, the content is 0.
2. Bits P4_0 to P4_1, and P4_3 to P4_4 in the P4 register are unavailable on this MCU.
If it is necessary to set bits P4_0 to PD4_1, and P4_3 to P4_4, set to 0 ("L" level). When read, the content is 0.
Figure 6.6 Registers P1, P3, and P4
Rev.1.30 Apr 14, 2006
REJ09B0222-0130
(1, 2)
Symbol Address
00E3h
PD1
00E7h
PD3
00EAh
PD4
Bit Symbol Bit Name
PDi_0 Port Pi0 direction bit
PDi_1 Port Pi1 direction bit
PDi_2 Port Pi2 direction bit
PDi_3 Port Pi3 direction bit
PDi_4 Port Pi4 direction bit
PDi_5 Port Pi5 direction bit
PDi_6 Port Pi6 direction bit
PDi_7 Port Pi7 direction bit
(1, 2)
Symbol Address
00E1h
P1
00E5h
P3
00E8h
P4
Bit Symbol Bit Name
Pi_0 Port Pi0 bit
Pi_1 Port Pi1 bit
Pi_2 Port Pi2 bit
Pi_3 Port Pi3 bit
Pi_4 Port Pi4 bit
Pi_5 Port Pi5 bit
Pi_6 Port Pi6 bit
Pi_7 Port Pi7 bit
Page 33 of 233
6. Programmable I/O Ports
After Reset
00h
00h
00h
Function
0 : Input mode
(functions as an input port)
1 : Output mode
(functions as an output port)
After Reset
Undefined
Undefined
Undefined
Function
The pin level of any I/O port w hich is set
to input mode can be read by reading the
corresponding bit in this register. The pin
level of any I/O port w hich is set to output
mode can be controlled by w riting to the
corresponding bit in this register.
0 : "L" level
(1)
1 : "H" level
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW