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REVISION HISTORY
Rev.
Date
1.10
Jun 09, 2005
1.20
Nov 01, 2005
R8C/18 Group, R8C/19 Group Hardware
Page
27
Figure 6.1 Note 1 added.
28
Figure 6.2 Note 1 added.
30
Figure 6.3 Note 4 added.
34
Table 6.7 is partly revised (register name).
36
Table 6.15 is partly revised (UCON → PD3).
105
Table 14.2 is partly revised (Write to Timer).
106
Table 14.3 is partly revised (Write to Timer).
108
Table 14.4 is partly revised (Write to Timer).
109
Table 14.5 is partly revised (Write to Timer).
112
Table 14.6 is partly revised (Write to Timer).
121
Table 14.7 is partly revised (Write to Timer).
196
Figure 17.16 is partly revised.
207
Table 18.10 is partly revised.
229
Appendix Figure 2.1, 2.2 are partly revised.
3
Table 1.2 Performance Outline of the R8C/19 Group;
Flash Memory: (Data area) → (Data flash)
4
Figure 1.1 Block Diagram;
"Peripheral Function" added,
"System Clock Generation" → "System Clock Generator" revised
6
Table 1.4 Product Information of R8C/19 Group;
ROM capacity: "Program area" → "Program ROM",
9
Table 1.5 Pin Description;
Power Supply Input: "VCC/AVCC" → "VCC",
Analog Power Supply Input: added
11
Figure 2.1 CPU Register;
"Reserved Area" → "Reserved Bit" revised
13
2.8.10 Reserved Area;
"Reserved Area" → "Reserved Bit" revised
15
3.2 R8C/19 Group, Figure 3.2 Memory Map of R8C/19 Group;
"Data area" → "Data flash",
"Program area" → "Program ROM" revised
16
Table 4.1 SFR Information(1);
0009h: "XXXXXX00b" → "00h"
000Ah: "00XXX000b" → "00h"
001Eh: "XXXXX000b" → "00h" revised
Description
Summary
(Program area) → (Program ROM) revised
"Data area" → "Data flash" revised
"VSS/AVSS" → "VSS" revised
C - 3
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