Renesas R8C/18 Series Hardware Manual page 136

R8C/18 Group, R8C/19 Group
Timer Count Source Setting Register
b7 b6 b5 b4 b3 b2 b1 b0
0 0 0 0
NOTE:
1. Do not sw itch count sources during a count operation. Stop the timer count before sw itching count sources.
Figure 14.15 TCSS Register
Rev.1.30 Apr 14, 2006
REJ09B0222-0130
Symbol Address
008Eh
TCSS
Bit Symbol Bit Name
Timer X count source select bits
TXCK0
TXCK1
— Reserved bits
(b3-b2)
Timer Z count source select bits
TZCK0
TZCK1
— Reserved bits
(b7-b6)
Page 121 of 233
After Reset
00h
Function
(1)
b1 b0
0 0 : f1
0 1 : f8
1 0 : fRING
1 1 : f2
Set to 0.
(1)
b5 b4
0 0 : f1
0 1 : f8
1 0 : Selects Timer X underflow .
1 1 : f2
Set to 0.
14. Timers
RW
RW
RW
RW
RW
RW
RW