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R8C/18 Group, R8C/19 Group
VREF
Software trigger
Timer Z
interrupt request
Figure 16.1
Comparator Block Diagram
Rev.1.30
Apr 14, 2006
REJ09B0222-0130
fRING-fast
AD register
b7
Data bus
ADCAP = 0
Trigger
ADCAP = 1
CH2 to CH0 = 100b
P1_0/AN8
CH2 to CH0 = 101b
P1_1/AN9
CH2 to CH0 = 110b
P1_2/AN10
CH2 to CH0 = 111b
P1_3/AN11
CH0 to CH2, ADGSEL0, and CKS0: Bits in ADCON0 register
CKS1, VCUT: Bits in ADCON1 register
Page 164 of 233
Comparator conversion
rate selection
CKS0 = 1
f1
CKS0 = 0
CKS0 = 1
f2
f4
CKS0 = 0
ADCON0
ADGSEL0 = 0
16. Comparator
CKS1 = 1
CKS1 = 0
Vref
Decoder
Comparator
VIN
ADGSEL0 = 1
φAD
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