Renesas R8C/18 Series Hardware Manual page 113

R8C/18 Group, R8C/19 Group
Option Function Select Register
b7 b6 b5 b4 b3 b2 b1 b0
1 1 1 1
NOTES:
1. The OFS register is on the flash memory. Write to the OFS register w ith a program.
2. If the block including the OFS register is erased, FFh is set to the OFS register.
Watchdog Timer Control Register
b7 b6 b5 b4 b3 b2 b1 b0
0 0
Figure 13.2 Registers OFS and WDC
Rev.1.30 Apr 14, 2006
REJ09B0222-0130
(1)
Symbol Address
0FFFFh
OFS
Bit Symbol Bit Name
Watchdog timer start
WDTON
select bit
— Reserved bit
(b1)
ROM code protect
ROMCR
disabled bit
ROM code protect bit
ROMCP1
— Reserved bits
(b6-b4)
Count source protect
mode after reset select
CSPROINI
bit
Symbol Address
000Fh
WDC
Bit Symbol Bit Name
— High-order bits of w atchdog timer
(b4-b0)
— Reserved bit
(b5)
— Reserved bit
(b6)
Prescaler select bit
WDC7
Page 98 of 233
Before Shipment
(2)
FFh
Function
0 : Starts w atchdog timer automatically after reset.
1 : Watchdog timer is inactive after reset.
Set to 1.
0 : ROM code protect disabled
1 : ROMCP1 enabled
0 : ROM code protect enabled
1 : ROM code protect disabled
Set to 1.
0 : Count source protect mode enabled after reset
1 : Count source protect mode disabled after reset
After Reset
00011111b
Function
Set to 0.
Set to 0.
0 : Divided by 16
1 : Divided by 128
13. Watchdog Timer
RW
RW
RW
RW
RW
RW
RW
RW
RO
RW
RW
RW