Renesas R8C/18 Series Hardware Manual page 159

R8C/18 Group, R8C/19 Group
Value set in TM1 register
Value set in TM0 register
0000h
TCC00 bit in
TCC0 register
IR bit in
CMP0IC register
IR bit in
CMP1IC register
CMP0_0 output
CMP1_0 output
Conditions:
TCC12 bit in TCC1 register = 1 (TC register is set to 0000h at compare 1 match occurrence )
TCC13 bit in TCC1 register = 1 (Compare 0 output selected)
TCC15 to TCC14 bits in TCC1 register = 11b (CMP output level is set to high at compare 0 match occurrence)
TCC17 to TCC16 bits in TCC1 register = 10b (CMP output level is set to low at compare 1 match occurrence)
TCOUT6 bit in TCOUT register = 0 (not inverted)
TCOUT7 bit in TCOUT register = 1 (inverted)
TCOUT0 bit in TCOUT register = 1 (CMP0_0 output enabled)
TCOUT3 bit in TCOUT register = 1 (CMP1_0 output enabled)
P1_0 bit in P1 register = 1 (high)
P3_0 bit in P3 register = 1 (high)
Figure 14.31 Operating Example in Output Compare Mode
Rev.1.30 Apr 14, 2006
REJ09B0222-0130
Count starts
Match
Set to 1 by program
1
0
1
0
1
0
1
0
1
0
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Match
Set to 0 when interrupt request is acknowledged, or set by program
Set to 0 when interrupt request is
acknowledged, or set by program
14. Timers
Match
Time