Renesas R8C/18 Series Hardware Manual page 168

R8C/18 Group, R8C/19 Group
Table 15.2 Registers Used and Settings in Clock Synchronous Serial I/O Mode
Register
U0TB 0 to 7
U0RB 0 to 7
OER
U0BRG 0 to 7
U0MR SMD2 to SMD0
CKDIR
U0C0 CLK1 to CLK0
TXEPT
NCH
CKPOL
UFORM
U0C1 TE
TI
RE
RI
UCON U0IRS
U0RRM
CNTRSEL
NOTE:
1. Set bits which are not in this table to 0 when writing to the above registers in clock synchronous
serial I/O mode.
Table 15.3 lists the I/O Pin Functions in Clock Synchronous Serial I/O Mode. The TXD0 pin outputs "H"
level between the operating mode selection of UART0 and transfer start. (If the NCH bit is set to 1
(N-channel open-drain output), this pin is in a high-impedance state.)
Table 15.3 I/O Pin Functions in Clock Synchronous Serial I/O Mode
Pin Name
TXD0 (P1_4) Output serial data
RXD0 (P1_5) Input serial data
CLK0 (P1_6) Output transfer clock CKDIR bit in U0MR register = 0
Input transfer clock
Rev.1.30 Apr 14, 2006
REJ09B0222-0130
Bit
Set data transmission.
Data reception can be read.
Overrun error flag
Set bit rate.
Set to 001b.
Select the internal clock or external clock.
Select the count source in the U0BRG register.
Transmit register empty flag
Select TXD0 pin output mode.
Select the transfer clock polarity.
Select the LSB first or MSB first.
Set this bit to 1 to enable transmission/reception.
Transmit buffer empty flag
Set this bit to 1 to enable reception.
Reception complete flag
Select the UART0 transmit interrupt source.
Set this bit to 1 to use continuous receive mode.
Set this bit to 1 to select P1_5/RXD0/CNTR01/INT11.
Function
(Outputs dummy data when performing reception only.)
PD1_5 bit in PD1 register = 0
(P1_5 can be used as an input port when performing transmission
only.)
CKDIR bit in U0MR register = 1
PD1_6 bit in PD1 register = 0
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Function
Selection Method
15. Serial Interface