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R8C/18 Group, R8C/19 Group
19.5
Notes on Comparator
•
Write to each bit (other than bit 6) in the ADCON0 register, each bit in the ADCON1 register, or the
CMPSEL bit in the ADCON2 register when the comparator conversion stops (before a trigger
occurs).
•
When changing comparator conversion operating mode, select an analog input pin again.
•
To use in one-shot mode, ensure that the comparator conversion is completed and the AD register is
read. The IR bit in the ADIC register or the ADST bit in the ADCON0 register can determine whether
the comparator conversion is completed.
•
To use in repeat mode, use the undivided main clock as the CPU clock.
•
If the ADST bit in the ADCON0 register is set to 0 (comparator conversion stops) by a program and
the comparator conversion is forcibly terminated during the comparator conversion operation, the
conversion result of the comparator will be indeterminate. If the ADST bit is set to 0 by a program, do
not use the AD register value.
Connect a 0.1 µ F capacitor between the VCC/AVCC pin and VSS/AVSS pin.
•
Rev.1.30
Apr 14, 2006
REJ09B0222-0130
Page 224 of 233
19. Usage Notes
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