Int3 Interrupt - Renesas R8C/18 Series Hardware Manual

R8C/18 Group, R8C/19 Group
12.2.4

INT3 Interrupt

The INT3 interrupt is generated by an INT3 input. Set the TCC07 bit in the TCC0 register to 0 (INT3).
When the TCC06 bit in the TCC0 register is set to 0, an INT3 interrupt request is generated in
synchronization with the count source of timer C. If the TCC06 bit is set to 1, the INT3 interrupt
request is generated when an INT3 input occurs.
The INT3 input contains a digital filter. The INT3 level is sampled every sampling clock cycle and if
the sampled input level matches three times, the IR bit in the INT3IC register is set to 1 (interrupt
requested). The sampling clock is selected by bits TCC11 to TCC10 in the TCC1 register. If filter is
selected, the interrupt request is generated in synchronization with the sampling clock, even if the
TCC06 bit is set to 1. The P3_3 bit in the P3 register indicates the value before filtering regardless of
the contents set in bits TCC11 to TCC10.
The INT3 pin is used with the TCIN pin.
If the TCC07 bit is set to 1 (fRING128), the INT3 interrupt is generated by the fRING128 clock. The
IR bit in the INT3IC register is set to 1 (interrupt requested) every fRING128 clock cycle or every half
fRING128 clock cycle.
Figure 12.15 shows the TCC0 Register and Figure 12.16 shows the TCC1 Register.
Timer C Control Register 0
b7 b6 b5 b4 b3 b2 b1 b0
0
NOTES:
1. Change this bit w hen the TCC00 bit is set to 0 (count stops).
2. The IR bit in the INT3IC register may be set to 1 (requests interrupt) w hen the TCC03, TCC04, TCC06, or TCC07 bit is
rew ritten. Refer to 12.5.5 Changing Interrupt Sources.
3. When the TCC13 bit is set to 1 (output compare mode) and an INT3
value of the TCC06 bit, an interrupt request is generated.
4. When using the INT3
Figure 12.15 TCC0 Register
Rev.1.30 Apr 14, 2006
REJ09B0222-0130
Symbol Address
009Ah
TCC0
Bit Symbol Bit Name
Timer C count start bit
TCC00
Timer C count source select
(1)
bits
TCC01
TCC02
_____
INT3 interrupt and capture
TCC03
polarity select bits
TCC04
— Reserved bit
(b5)
_____
INT3 interrupt request
generation timing select
TCC06
(2, 3)
bit
_____
INT3 interrupt and capture
TCC07
(1, 2)
input sw itch bit
_____ _____
filter, the INT3 interrupt is generated in synchronization w ith the clock for the digital filter.
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0 : Stops counting.
1 : Starts counting.
b2 b1
0 0 : f1
0 1 : f8
1 0 : f32
1 1 : fRING-fast
b4 b3
0 0 : Rising edge
0 1 : Falling edge
(1, 2)
1 0 : Both edges
1 1 : Do not set.
Set to 0.
_____
0 : INT3 interrupt is generated in
synchronization w ith timer C count source.
_____
1 : INT3 interrupt is generated w hen
_____
INT3 interrupt is input.
_____
0 : INT3
1 : fRING128
_____
interrupt is input, regardless of the setting
12. Interrupts
After Reset
00h
Function
(4)
RW
RW
RW
RW
RW
RW
RW
RW
RW