Renesas R8C/18 Series Hardware Manual page 97

R8C/18 Group, R8C/19 Group
12.1.6.7 Saving a Register
In the interrupt sequence, the FLG register and PC are saved to the stack.
After an extended 16 bits, 4 high-order bits in the PC and 4 high-order (IPL) and 8 low-order bits in
the FLG register, are saved to the stack, the 16 low-order bits in the PC are saved. Figure 12.7
shows the Stack State Before and After Acknowledgement of Interrupt Request.
The other necessary registers are saved by a program at the beginning of the interrupt routine. The
PUSHM instruction can save several registers in the register bank being currently used
single instruction.
NOTE:
1. Selectable from registers R0, R1, R2, R3, A0, A1, SB, and FB.
Stack
Address
MSB
m−4
m−3
m−2
m−1
m
Previous stack contents
m+1
Previous stack contents
Stack state before interrupt request
is acknowledged
NOTE:
1.When executing software number 32 to 63 INT instructions,
Figure 12.7 Stack State Before and After Acknowledgement of Interrupt Request
The register saving operation, which is performed as part of the interrupt sequence, saved in 8 bits at
a time in four steps. Figure 12.8 shows the Register Saving Operation.
.
Address
[SP] − 5
[SP] − 4
[SP] − 3
[SP] − 2
[SP] − 1
[SP]
NOTE:
1. [SP] indicates the initial value of the SP when an interrupt request is acknowledged.
After registers are saved, the SP content is [SP] minus 4. When executing software number 32 to 63
INT instructions, this SP is specified by the U flag. Otherwise it is ISP.
Figure 12.8 Register Saving Operation
Rev.1.30 Apr 14, 2006
REJ09B0222-0130
LSB
[SP]
SP value before
interrupt is generated
this SP is specified by the U flag. Otherwise it is ISP.
Stack
PCL
PCM
FLGL
FLGH PCH
Page 82 of 233
Stack
Address
MSB
PCL
m−4
PCM
m−3
FLGL
m−2
m−1
FLGH
m
Previous stack contents
m+1
Previous stack contents
Stack state after interrupt request
is acknowledged
Sequence in which
order registers are
saved
(3)
(4)
Saved, 8 bits at a time
(1)
(2)
Completed saving
registers in four
operations.
LSB
[SP]
New SP value
PCH
PCH : 4 high-order bits of PC
PCM : 8 middle-order bits of PC
PCL : 8 low-order bits of PC
FLGH : 4 high-order bits of FLG
FLGL : 8 low-order bits of FLG
PCH : 4 high-order bits of PC
PCM : 8 middle-order bits of PC
PCL : 8 low-order bits of PC
FLGH : 4 high-order bits of FLG
FLGL : 8 low-order bits of FLG
12. Interrupts
(1)
with a