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R8C/18 Group, R8C/19 Group
15.2.2
Bit Rate
In UART mode, the bit rate is the frequency divided by the UiBRG (i = 0 or 1) register.
UART Mode
• Internal clock selected
• External clock selected
i = 0 or 1
Figure 15.12
Calculation Formula of UiBRG (i = 0 or 1) Register Setting Value
Table 15.7
Bit Rate Setting Example in UART Mode (Internal Clock Selected)
BRG
Bit Rate
Count
(bps)
Source
1200
2400
4800
9600
14400
19200
28800
31250
38400
51200
i = 0 or 1
Rev.1.30
Apr 14, 2006
REJ09B0222-0130
UiBRG register setting value =
Fj: Count source frequency of the UiBRG register (f1, f8, or f32)
UiBRG register setting value =
fEXT: Count source frequency of the UiBRG register (external clock)
System Clock = 20 MHz
UiBRG
Actual Time
Setting Value
f8
129(81h)
f8
64(40h)
f8
32(20h)
f1
129(81h)
f1
86(56h)
f1
64(40h)
f1
42(2Ah)
f1
39(27h)
f1
32(20h)
f1
23(17h)
Page 161 of 233
fj
Bit Rate × 16
fEXT
Bit Rate × 16
Error (%)
(bps)
Setting Value
1201.92
0.16
2403.85
0.16
4734.85
-1.36
9615.38
0.16
14367.82
-0.22
19230.77
0.16
29069.77
0.94
31250.00
0.00
37878.79
-1.36
52083.33
1.73
15. Serial Interface
- 1
- 1
System Clock = 8 MHz
UiBRG
Actual
Time (bps)
51(33h)
1201.92
25(19h)
2403.85
12(0Ch)
4807.69
51(33h)
9615.38
34(22h)
14285.71
25(19h)
19230.77
16(10h)
29411.76
15(0Fh)
31250.00
12(0Ch)
38461.54
9(09h)
50000.00
Error (%)
0.16
0.16
0.16
0.16
-0.79
0.16
2.12
0.00
0.16
-2.34
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