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R8C/18 Group, R8C/19 Group
6.
Programmable I/O Ports
There are 13 programmable Input/Output ports (I/O ports) P1, P3_3 to P3_5, P3_7, and P4_5. P4_2 can be
used as an input-only port. Also, P4_6 and P4_7 can be used as input-only ports if the main clock oscillation
circuit is not used. Table 6.1 lists an Overview of Programmable I/O Ports.
Table 6.1
Overview of Programmable I/O Ports
Ports
P1
P3_3, P4_5
P3_4, P3_5, P3_7
(3)
P4_2, P4_6, P4_7
NOTES:
1. In input mode, whether an internal pull-up resistor is connected or not can be selected by registers PUR0 and
PUR1.
2. These ports can be used as the LED drive port by setting the DRR register to 1 (high).
3. When the main clock oscillation circuit is not used, P4_6 and P4_7 can be used as input-only ports.
6.1
Functions of Programmable I/O Ports
The PDi_j (j=0 to 7) bit in the PDi (i=1, 3, and 4) register controls I/O of ports P1, P3_3 to P3_5, P3_7,
and P4_5. The Pi register consists of a port latch to hold output data and a circuit to read pin states.
Figures 6.1 to 6.3 show the Configurations of Programmable I/O Ports.
Table 6.2 lists the Functions of Programmable I/O Ports. Also, Figure 6.5 shows Registers PD1, PD3,
and PD4. Figure 6.6 shows Registers P1, P3, and P4, Figure 6.7 shows Registers PUR0 and PUR1, and
Figure 6.8 shows the DRR Register.
Table 6.2
Functions of Programmable I/O Ports
Operation when
Accessing
Pi Register
Reading
Writing
NOTE:
1. Nothing is assigned to bits PD3_0 to PD3_2, PD3_6, PD4_0 to PD4_4, PD4_6, and PD4_7.
6.2
Effect on Peripheral Functions
Programmable I/O ports function as I/O ports for peripheral functions (Refer to Table 1.6 Pin Name
Information by Pin Number of PLSP0020JB-A, PRDP0020BA-A packages). Table 6.3 lists the
Settings of PDi_j Bit when Functioning as I/O Ports for Peripheral Functions. Refer to the description of
each function for information on how to set peripheral functions.
Table 6.3
Settings of PDi_j Bit when Functioning as I/O Ports for Peripheral Functions
I/O of Peripheral Functions
Input
Output
6.3
Pins Other than Programmable I/O Ports
Figure 6.4 shows the Configuration of I/O Pins.
Rev.1.30
Apr 14, 2006
REJ09B0222-0130
I/O
Type of Output
I/O
CMOS3 State
I/O
CMOS3 State
I/O
CMOS3 State
I
(No output function)
When PDi_j Bit is Set to 0 (Input Mode)
Read pin input level
Write to the port latch
Set this bit to 0 (input mode).
This bit can be set to either 0 or 1 (output regardless of the port setting).
Page 28 of 233
Internal Pull-Up
I/O Setting
Resistor
Set per bit
Set every 4 bits
Set per bit
Set every bit
Set per bit
Set every 3 bits
None
None
Value of PDi_j Bit in PDi Register
When PDi_j Bit is Set to 1 (Output Mode)
Read the port latch
Write to the port latch. The value written to the
port latch is output from the pin.
PPDi_j Bit Settings for Shared Pin Functions
6. Programmable I/O Ports
Drive Capacity
Selection
(1)
(2)
Set every bit
of P1_0
to P1_3
(1)
None
(1)
None
None
(1)
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