Renesas R8C/18 Series Hardware Manual page 164

R8C/18 Group, R8C/19 Group
UARTi Transmit/Receive Mode Register (i = 0 or 1)
b7 b6 b5 b4 b3 b2 b1 b0
0
NOTES:
1. Set the PD1_6 bit in the PD1 register to 0 (input).
2. Do not set bits SMD2 to SMD0 in the U1MR register to any values other than 000b, 100b, 101b, and 110b.
3. Set the CKDIR bit in UART1 to 0 (internal clock).
Figure 15.4 Registers U0MR to U1MR
Rev.1.30 Apr 14, 2006
REJ09B0222-0130
Symbol Address
U0MR 00A0h
U1MR 00A8h
Bit Symbol Bit Name
Serial interface mode select
SMD0 (2)
bits
SMD1
SMD2
Internal/external clock select
CKDIR
(3)
bit
Stop bit length select bit
STPS
Odd/even parity select bit
PRY
Parity enable bit
PRYE
— Reserved bit
(b7)
Page 149 of 233
After Reset
00h
00h
Function
b2 b1 b0
0 0 0 : Serial interface disabled
0 0 1 : Clock synchronous serial I/O mode
1 0 0 : UART mode transfer data 7 bits long
1 0 1 : UART mode transfer data 8 bits long
1 1 0 : UART mode transfer data 9 bits long
Other than above : Do not set.
0 : Internal clock
(1)
1 : External clock
0 : 1 stop bit
1 : 2 stop bits
Enables w hen PRYE = 1.
0 : Odd parity
1 : Even parity
0 : Parity disabled
1 : Parity enabled
Set to 0.
15. Serial Interface
RW
RW
RW
RW
RW
RW
RW
RW
RW