Table of Contents
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REVISION HISTORY
Rev.
Date
1.00
May 27, 2005
R8C/18 Group, R8C/19 Group Hardware
Page
57
Figure 10.5 is partly deleted.
61
"10.3.2 CPU Clock" is partly deleted.
62
Table 10.2 is partly revised.
63
"10.4.1.1 High-speed Mode" is partly deleted.
"10.4.1.2 Medium-speed Mode" is partly deleted.
"10.4.1.3 High-speed, Low-speed On-chip Oscillator Mode" is partly
deleted.
66
Figure 10.8 is revised.
67
Figure 10.9 is deleted.
69
"10.6.1 Stop Mode and Wait Mode" is revised.
102
Figure 14.1 is partly revised.
105
Table 14.2 is partly revised.
106
Table 14.3 is partly revised.
108
Table 14.4 is partly revised.
109
Table 14.5 is partly revised.
112
Table 14.6 is partly revised.
164
Figure 16.2 is partly revised.
167
Figure 16.4 is partly revised.
169
Figure 16.5 is partly revised.
183
Figure 17.7 is partly revised.
185
Figure 17.9 is partly revised.
186
Figure 17.11 is partly revised.
190
Figure 17.14 is partly revised.
194
"17.5 Standard Serial I/O Mode" is revised.
Table 17.7 is added.
195
Table 17.8 is partly revised.
196
Title of Figure 17.16 is partly revised.
"17.5.1.1 Example of Circuit Application in the Standard Serial I/O Mode"
197
is revised.
Figure 17.17 is added.
Title of Figure 17.18 is partly revised.
200
Former "17.7.1.7" is deleted.
206
Table 18.9 is revised.
207
Table 18.10 is partly revised.
209
Table 18.13 is partly revised.
213
Table 18.20 is partly revised.
216
"19.1.1 Stop Mode and Wait Mode" is revised.
"19.1.3 Oscillation Circuit Constants" is added.
225
Former "19.6.1.7" is deleted."
227
"20. Precautions on On-chip Debugger" is partly added.
Description
Summary
C - 2
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