Block Diagram - Renesas R8C/18 Series Hardware Manual

16-bit single-chip mcu
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R8C/18 Group, R8C/19 Group
1.3

Block Diagram

Figure 1.1 shows a Block Diagram.
I/O ports
Peripheral Functions
Timers
Timer X (8 bits)
Timer Z (8 bits)
Timer C (16 bits)
Watchdog timer
(15 bits)
Figure 1.1
Block Diagram
Rev.1.30
Apr 14, 2006
REJ09B0222-0130
8
Port P1
Comparator
×
(1 bit
4 channels)
UART or
clock synchronous serial I/O
×
(8 bits
UART
×
(8 bits
R8C/Tiny Series CPU core
R0H
R0L
R1H
R1L
R2
R3
A0
A1
FB
Page 4 of 233
4
Port P3
System clock generator
High-speed on-chip
Low-speed on-chip
1 channel)
1 channel)
SB
USP
ISP
INTB
PC
FLG
NOTES:
1. ROM size varies with MCU type.
2. RAM size varies with MCU type.
1. Overview
1
3
Port P4
XIN-XOUT
oscillator
oscillator
Memory
(1)
ROM
(2)
RAM
Multiplier

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