Renesas R8C/18 Series Hardware Manual page 57

R8C/18 Group, R8C/19 Group
Voltage detection 2 circuit
VCA27
VCC
+
Noise filter
Internal
-
reference
(Filter width: 200 ns)
voltage
Voltage detection 2 signal
is held "H" when VCA27 bit
is set to 0 (disabled).
Watchdog timer block
Watchdog timer
underflow signal
VW2C0 to VW2C3, VW2F0, VW2F1, VW2C6, VW2C7: Bits in VW2C register
VCA13: Bit in VCA1 register
VCA27: Bit in VCA2 register
Figure 7.3 Block Diagram of Voltage Monitor 2 Interrupt/Reset Generation Circuit
Rev.1.30 Apr 14, 2006
REJ09B0222-0130
Voltage monitor 2 interrupt/reset generation circuit
VW2F1 to VW2F0
1/2 1/2
fRING-S
VCA13
Voltage
detection
2 signal
VW2C3
VW2C7
This bit is set to 0 (not detected) by writing 0
by a program.
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= 00b
= 01b
= 10b
VW2C2 bit is set to 0 (not detected) by
writing 0 by a program.
= 11b
1/2
When VCA27 bit is set to 0 (voltage
detection 2 circuit disabled), VW2C2
bit is set to 0.
Digital
filter VW2C2
VW2C1
VW2C0
VW2C6
7. Voltage Detection Circuit
Watchdog
timer interrupt
signal
Voltage monitor 2
interrupt signal
Non-maskable
interrupt signal
Oscillation stop
detection
interrupt signal
Voltage
monitor 2
reset signal