(Max T Timeout = 25 Ms) - ST STM32L4 5 Series Reference Manual

RM0351
t
LOW:MEXT
the same value for the both.
Then the timer is enabled by setting the TEXTEN bit in the I2C_TIMEOUTR register.
If the SMBus peripheral performs a cumulative SCL stretch for a time greater than
(TIMEOUTB+1) x 2048 x t
detection on page 1269
Refer to
Caution: Changing the TIMEOUTB configuration is not allowed when the TEXTEN bit is set.
Bus Idle detection
In order to enable the t
with the timer reload value in order to obtain the t
configured to '1 in order to detect both SCL and SDA high level timeout.
Then the timer is enabled by setting the TIMOUTEN bit in the I2C_TIMEOUTR register.
If both the SCL and SDA lines remain high for a time greater than (TIMEOUTA+1) x 4 x
t , the TIMEOUT flag is set in the I2C_ISR register.
I2CCLK
Refer to
tIDLE = 50 µs)
Caution: Changing the TIMEOUTA and TIDLE configuration is not allowed when the TIMEOUTEN is
set.
SMBus:
39.4.12
This section is relevant only when SMBus feature is supported. Please refer to
I2C implementation.
•
Configuring the maximum duration of t
Table 226. Examples of TIMEOUTA settings for various I2CCLK frequencies
f
I2CCLK
8 MHz
16 MHz
32 MHz
48 MHz
•
Configuring the maximum duration of t
Table 227. Examples of TIMEOUTB settings for various I2CCLK frequencies
f
I2CCLK
8 MHz
for a master. As the standard specifies only a maximum, the user can choose
section, the TIMEOUT flag is set in the I2C_ISR register.
Table 227: Examples of TIMEOUTB settings for various I2CCLK frequencies
check, the 12-bit TIMEOUTA[11:0] field must be programmed
IDLE
Table 228: Examples of TIMEOUTA settings for various I2CCLK frequencies (max
I2C_TIMEOUTR register configuration examples
TIMEOUTA[11:0]
bits
0x61
0xC3
0x186
0x249
TIMEOUTB[11:0]
bits
0x1F
, and in the timeout interval described in
I2CCLK
IDLE
TIMEOUT
(max t = 25 ms)
TIMEOUT
TIDLE
TIMEOUTEN
bit
0
0
0
0
LOW:SEXT
TEXTEN bit
1
DocID024597 Rev 5
Inter-integrated circuit (I2C) interface
parameter. The TIDLE bit must be
to 25 ms:
t
bit
1 98 x 2048 x 125 ns = 25 ms
1 196 x 2048 x 62.5 ns = 25 ms
1 391 x 2048 x 31.25 ns = 25 ms
1 586 x 2048 x 20.08 ns = 25 ms
and t to 8 ms:
LOW:MEXT
t
LOW:EXT
32 x 2048 x 125 ns = 8 ms
Bus idle
Section 39.3:
TIMEOUT
1271/1830
1301