Software Exception; Operation - NEC PD703114 User Manual

7.4 Software Exception

A software exception is generated when the CPU executes the TRAP instruction, and can be always
acknowledged.

7.4.1 Operation

If a software exception occurs, the CPU performs the following processing, and transfers control to the handler
routine:
(1) Saves the restored PC to EIPC.
(2) Saves the current PSW to EIPSW.
(3) Writes an exception code to the lower 16 bits (EICC) of ECR (interrupt source).
(4) Sets the EP and ID bits of the PSW.
(5) Sets the handler address (00000040H or 00000050H) corresponding to the software exception to the PC, and
transfers control.
Figure 7-8 illustrates the processing of a software exception.
Note TRAP instruction format: TRAP vector (the vector is a value from 00H to 1FH.)
The handler address is determined by the TRAP instruction's operand (vector). If the vector is 00H to 0FH, it
becomes 00000040H, and if the vector is 10H to 1FH, it becomes 00000050H.
CHAPTER 7 INTERRUPT/EXCEPTION PROCESSING FUNCTION
Figure 7-8. Software Exception Processing
CPU processing
User's Manual U15195EJ5V0UD
Note
TRAP instruction
EIPC Restored PC
EIPSW PSW
ECR.EICC Exception code
PSW.EP 1
PSW.ID 1
PC Handler address
Exception processing
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