Basic Configuration - NEC PD703114 User Manual

V850e/ia2 32-bit single-chip microcontrollers
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9.1.4 Basic configuration

The basic configuration is shown below.
Figure 9-1. Block Diagram of Timer 0 (Mode 0: Symmetric Triangular Wave, Mode 1: Asymmetric
Triangular Wave)
BFCMn3
CM0n3
1/1
16
f
1/2
XX
TM0n
1/4
f
f
/2
CLK
1/8
XX
1/16
1/32
16
BFCMn0
CM0n0
BFCMn1
CM0n1
BFCMn2
CM0n2
BFCMn4
CM0n4
BFCMn5
CM0n5
Remarks 1. TM0n:
CM0n0 to CM0n5:
BFCMn0 to BFCMn5: Buffer registers
DTRRn:
DTMn0 to DTMn2:
ALVTO:
ALVUB:
ALVVB:
ALVWB:
S/R:
2. n = 0, 1
3. f
: Internal system clock
XX
4. f
: Base clock (40 MHz (MAX.))
CLK
198
CHAPTER 9 TIMER/COUNTER FUNCTION
INTCM0n3
INTTM0n
S/R
R
S
INTCM010
R
S
INTCM011
R
S
INTCM012
INTCM0n4
INTCM0n5
Timer register
Compare registers
Dead-time timer reload register
Dead-time timers
Bit 7 of TOMRn register
Bit 6 of TOMRn register
Bit 5 of TOMRn register
Bit 4 of TOMRn register
Set/Reset
User's Manual U15195EJ5V0UD
Output control by
6
external input (ESOn),
TM0n timer operation
DTRRn
ALVTO
12
Underflow
DTMn0
R
S
R
S
ALVUB
Underflow
DTMn1
R
S
R
S
ALVVB
Underflow
DTMn2
R
S
R
S
ALVWB
TO0n0
(U phase)
TO0n1
(U phase)
TO0n2
(V phase)
TO0n3
(V phase)
TO0n4
(W phase)
TO0n5
(W phase)

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