NEC PD703114 User Manual page 182

Figure 8-1 shows the operation of the clock generator in normal operation mode, HALT mode, IDLE mode, and
software STOP mode.
An effective low power consumption system can be realized by combining these modes and switching modes
according to the required use.
Release according to RESET,
NMI, or maskable interrupt
Software STOP mode
Note INTPn (n = 0 to 4, 20 to 25)
However, in cases such as when a digital filter using clock sampling is selected as the noise eliminator
for INTP20 to INTP25, the software STOP or IDLE mode cannot be released.
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CHAPTER 8 CLOCK GENERATION FUNCTION
Figure 8-1. Power Save Mode State Transition Diagram
Normal operation mode
Note
Set STOP mode
User's Manual U15195EJ5V0UD
Release according to RESET,
NMI, or maskable interrupt
Set HALT mode
Release according to RESET,
Note
NMI, or maskable interrupt
Set IDLE mode
IDLE mode
HALT mode