NEC PD703114 User Manual page 446

V850e/ia2 32-bit single-chip microcontrollers
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<7>
<6>
ASIS1
SOT1
SIR1
Bit position
Bit name
7
SOT1
6
SIR1
4
RB8
2
PE1
1
FE1
0
OVE1
446
CHAPTER 10 SERIAL INTERFACE FUNCTION
5
4
3
0
RB8
0
Status flag indicating transmission status.
0: Transmission end timing (when INTST1 is generated)
1: Indicates transmission status
Note
The transmission status is the status until the specified number of stop
bits has been transmitted following write operation to the transmit register.
During 2-frame continuous transmission, this status is until the stop bit of
the 2nd frame has been transmitted.
Status flag indicating reception status.
0: Reception end timing (when INTSR1 is generated)
1: Indicates reception status
Note
The reception status is the status until stop bit detection from the start bit
detection timing.
Indicates contents of receive data extension bit (1 bit) when 9-bit extended format
is specified (EBS bit of ASIM11 register = 1)
Status flag indicating parity error
0: Processing to read data from reception buffer
1: When transmit parity and receive parity don't match
Caution No parity error is generated if no parity is specified or 0 parity is
specified by the PS1, PS0 bits of the ASIM10 register.
Status flag indicating framing error
0: Processing to read data from reception buffer
1: When stop bit is not detected
Status flag indicating overrun error
0: Processing to read data from reception buffer
1: When UART1 has completed next reception processing prior to loading
receive data from reception buffer
Since the contents of the receive shift register are transferred to the reception
buffer (RXB1, RXBL1) every time 1 frame is received, the next receive data is
overwritten to the reception buffer (RXB1, RXBL1) and the previous receive data is
discarded.
User's Manual U15195EJ5V0UD
<2>
<1>
<0>
PE1
FE1
OVE1
Function
Note
Note
Address
After reset
FFFFFA2CH
00H

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