NEC PD703114 User Manual page 459

V850e/ia2 32-bit single-chip microcontrollers
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Figure 10-20. Asynchronous Serial Interface Reception Completion Interrupt Timing
8 serial clocks
RXD1 (input)
INTSR1 interrupt
Flag in reception
(SIR1)
8 serial clocks
RXD1 (input)
INTSR1 interrupt
Flag in reception
(SIR1)
8 serial clocks
RXD1 (input)
INTSR1 interrupt
Flag in reception
(SIR1)
Cautions 1. Even if a reception error occurs, be sure to read 2-frame continuous reception buffer
register 1 (RXB1)/receive buffer register 1 (RXBL1). If the RXB1 or RXBL1 register is not
read, an overrun error will occur at the next data reception, and the reception error state will
continue indefinitely.
2. Reception is always performed with a stop bit length of 1 bit. A second stop bit is ignored.
CHAPTER 10 SERIAL INTERFACE FUNCTION
(a) When stop bit length = 1 bit
D0
D1
Start
(b) When stop bit length = 2 bits
Start
D0
D1
D2
(c) In 2-frame continuous transmission mode
Parity Stop
D0
D1
Start
1st frame
User's Manual U15195EJ5V0UD
D2
D6
D7
D6
D7
Start
D1
D5
2nd frame
8 serial clocks
Parity
Stop
8 serial clocks
Stop
Parity
8 serial clocks
D6
D7
Parity
Stop
459

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