NEC PD703114 User Manual page 687

V850e/ia2 32-bit single-chip microcontrollers
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Edition
2nd
Addition of generating source of CC10IC1 register in Table 7-1 Interrupt/Exception Source
List
Change of description in Figure 7-2 Acknowledging Non-Maskable Interrupt Request
Addition of Caution and change of description in 7.3.8 (2) Signal edge selection register 10
(SESA10)
Addition of Caution in 7.3.8 (3) Valid edge selection register (SESC)
Addition and change of description in 7.3.8 (4) Timer 2 input filter mode registers 0 to 5
(FEM0 to FEM5)
Modification of description in 7.8 Periods in Which Interrupts Are Not Acknowledged
Change of description on bits that can be manipulated and data setting sequences to CKC in
8.3.4 Clock control register (CKC)
Modification of Note in Figure 8-1 Power Save Mode State Transition Diagram
Modification of operation status of ASTB in Table 8-4 Operation Status in IDLE Mode
Addition and modification of description in 8.5.4 (2) Release of IDLE mode
Change of operation status of ASTB in Table 8-6 Operation Status in Software STOP Mode
Addition and modification of description in 8.5.5 (2) Release of software STOP mode
Addition and modification of description and change of timing chart in 8.6.1 (1) Securing the
time using an on-chip time base counter
Modification of timing chart in 8.6.1 (2) Securing the time according to the signal level width
(RESET pin input)
Addition of a table in 9.1.2 Function overview (timer 0)
Addition of Caution in Table 9-2 Operation Modes of Timer 0
Addition and modification of description in 9.1.5 (3) Timer unit control registers 00, 01
(TUC00, TUC01)
Modification of description in 9.1.5 (4) Timer output mode registers 0, 1 (TOMR0, TOMR1)
Addition and modification of description in 9.1.5 (6) PWM software timing output registers 0,
1 (PSTO0, PSTO1) and addition of Figures 9-9 to 9-14
Addition of Remark in 9.1.6 Operation
Addition of Remark in 9.1.6 (2) PWM mode 0: Triangular wave modulation (right-left
symmetric waveform control) [Output waveform width in respect to set value]
Addition of Remark in 9.1.6 (3) PWM mode 1: Triangular wave modulation (right-left
asymmetric waveform control) [Output waveform width in respect to set value]
Addition of Remark in 9.1.6 (4) PWM mode 2: Sawtooth wave modulation [Output
waveform width in respect to set value]
Addition of Remark in Figure 9-30 TM0CEn Bit Write and TM0n Timer Operation Timing
Change of description in 9.2.2 Function overview (timer 1)
Change of description in Table 9-5 Timer 1 Configuration List
Modification of Figure 9-45 Block Diagram of Timer 1
Modification of description in 9.2.4 (1) Timer 1/timer 2 clock selection register (PRM02)
Addition of description in 9.2.4 (3) Timer control register 10 (TMC10)
Modification of description in 9.2.4 (5) Signal edge selection register 10 (SESA10)
Change of description in Figure 9-46 TM10 Block Diagram (During PWM Output Operation)
Change of description in 9.3.2 Function overview (timer 2)
Change of description in Table 9-9 Timer 2 Configuration List
Addition of Table 9-10 Capture/Compare Operation Sources
Addition of Table 9-11 Output Level Sources During Timer Output
Change of description in Figure 9-62 Block Diagram of Timer 2
APPENDIX D REVISION HISTORY
Major Revision up to Previous Edition
User's Manual U15195EJ5V0UD
(2/7)
Applied to:
CHAPTER 7
INTERRUPT/
EXCEPTION
PROCESSING
FUNCTION
CHAPTER 8
CLOCK
GENERATION
FUNCTION
CHAPTER 9
TIMER/COUNTER
FUNCTION (REAL-
TIME PULSE UNIT)
687

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