NEC PD703114 User Manual page 493

V850e/ia2 32-bit single-chip microcontrollers
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Figure 10-27. Timing Chart in Single Transfer Mode (1/2)
(a) In transmission/reception mode, data length: 8 bits, transfer direction: MSB first, no interrupt delay,
single transfer mode, operation mode: CKP bit = 0, DAP bit = 0
SCKn
(I/O)
SOn
0
(output)
SIn
1
(input)
Reg_R/W
Write 55H to SOTBLn register
SOTBLn
register
SIOLn
register
SIRBLn
register
CSOTn
bit
INTCSIn
interrupt
Remarks 1. n = 0, 1
2. Reg_R/W:
CHAPTER 10 SERIAL INTERFACE FUNCTION
1
0
0
1
ABH
56H
ADH
Internal signal.
This signal indicates that receive data buffer register (SIRBn/
SIRBLn) read or transmit data buffer register (SOTBn/SOTBLn) write was
performed.
User's Manual U15195EJ5V0UD
1
0
1
0
1
0
55H (transmit data)
5AH
B5H
0
1
(55H)
1
0
(AAH)
6AH
D5H
AAH
AAH
493

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