NEC PD703114 User Manual page 207

V850e/ia2 32-bit single-chip microcontrollers
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Bit position
Bit name
13 to 11
CUL02 to CUL00
10 to 8
PRM02 to PRM00
5
TM0CEDn
Remark
n = 0, 1
CHAPTER 9 TIMER/COUNTER FUNCTION
Cautions 1. The INTTM0n and INTCM0n3 interrupts can be culled at the same
culling ratio (1/1, 1/2, 1/4, 1/8, 1/16).
2. Even when BFTE3 = 1, BFTEN = 1 (settings to transfer data from
the BFCMn0 to BFCMn3 registers to the CM0n0 to CM0n3
registers), transfer is not performed at the generation timing of
the culled INTTM0n and INTCM0n3 interrupts if MBFTE = 0.
3. If the culling ratio is changed during a count operation, the new
culling ratio is applied after an interrupt has occurred at the
culling ratio prior to the change (see Figure 9-5).
4. The INTCM010 to INTCM012, INTCM0n4, and INTCM0n5
interrupts are not affected by the CUL02 to CUL00 bits (the
interrupts occur each time at the same culling ratio as when
CUL02 to CUL00 = 000 (1/1)).
Specifies the count clock for TM0n.
PRM02
PRM01
0
0
0
0
0
1
0
1
1
0
1
0
Other than above
Caution
The division ratio switch timing is from when the TM0n value has
become 0000H and the INTTM0n interrupt has occurred. Therefore,
the division ratio is not switched at the timing that corresponds to
interrupt culling.
Remark For the base clock (f
(PRM01).
Specifies the operation of the DTMn0 to DTMn2 timers..
0: DTMn0 to DTMn2 perform count operation
1: DTMn0 to DTMn2 stopped
Cautions 1.
Changing the TM0CEDn bit during TM0n operation (TM0CEn = 1)
is prohibited.
2.
If TM0n is operated when TM0CEDn = 1, a signal without dead
time is output to the TO0n0 to TO0n5 pins.
User's Manual U15195EJ5V0UD
Function
PRM00
Count clock
0
f
CLK
1
f
CLK
0
f
CLK
1
f
CLK
0
f
CLK
1
f
CLK
Setting prohibited
), see 9.1.5 (1) Timer 0 clock selection register
CLK
(2/4)
/2
/4
/8
/16
/32
207

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