NEC PD703114 User Manual page 288

(3) Relationship between interrupt generation and STINTn bit of TMC0n register
The interrupt generation timing for the setting of the STINTn bit of the TMC0n register and the interrupt culling
ratio setting (bits CUL02 to CUL00) in the various modes is described below.
If, to realize the INTTM0n and INTCM0n3 interrupt culling function for TM0n, bits CUL02 to CUL00 of the
TMC0n register are set for a culling ratio other than 1/1, and count operation is started, the interrupt output
order differs according to the setting of the STINTn bit when counting starts.
Figure 9-42. Interrupt Generation Timing in PWM Mode 0 (Symmetric Triangular Wave), PWM Mode 1
(Asymmetric Triangular Wave): In Case of Interrupt Culling Ratio of 1/1
TM0CEn bit
CM0n3
TM0n
0000H 0001H 0002H 0003H 0004H 0003H 0002H 0001H 0000H 0001H 0002H 0003H 0004H 0003H 0002H 0001H 0000H 0001H
f
CLK
INTCM0n3
INTTM0n
TM0CEn bit
CM0n3
TM0n
0000H 0001H 0002H 0003H 0004H 0003H 0002H 0001H 0000H 0001H 0002H 0003H 0004H 0003H 0002H 0001H 0000H 0001H
f
CLK
INTCM0n3
INTTM0n
Remarks 1. n = 0, 1
2. f : Base clock
CLK
288
CHAPTER 9 TIMER/COUNTER FUNCTION
(a) When STINTn bit = 0
0004H
(b) When STINTn bit = 1
0004H
User's Manual U15195EJ5V0UD