NEC PD703114 User Manual page 217

V850e/ia2 32-bit single-chip microcontrollers
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Data is set to timer output mode registers 0 and 1 (TOMR0, TOMR1) in the following sequence.
<1> Prepare the data to be set to timer output mode registers 0 and 1 (TOMR0, TOMR1) in a general-purpose
register.
<2> Write data to TOMR write enable registers 0 and 1 (SEPC0, SPEC1).
<3> Set timer output mode registers 0 and 1 (TOMR0, TOMR1) (using the following instructions).
• Store instruction (ST/SST instructions)
• Bit manipulation instruction (SET1/CLR1/NOT1 instructions)
[Description Example] <1> MOV
<2> ST.B
<3> ST.B
Remark n = 0, 1
To read the TOMRn register, no special sequence is required.
Cautions 1. Prohibit interrupts between SPECn issuance (<2>) and the TOMRn register write that
immediately follows (<3>).
2. The data written to the SPECn register is dummy data; use the same register as the general-
purpose register used to set the TOMRn register (<3> in the above example) for SPECn
register write (<2> in the above example). The same applies when using a general-purpose
register for addressing.
3. Do not write to the SPECn register or TOMRn register using DMA transfer.
CHAPTER 9 TIMER/COUNTER FUNCTION
0x04, r10
r10, SPECn [r0]
r10, TOMRn [r0]
User's Manual U15195EJ5V0UD
217

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