Configuration - NEC PD703114 User Manual

6.2 Configuration

CPU
External I/O
Remark n = 0 to 3
106
CHAPTER 6 DMA FUNCTIONS (DMA CONTROLLER)
Internal RAM
Internal bus
Data Address
control
Count
control
Channel
control
Bus interface
External bus
External External
RAM ROM
User's Manual U15195EJ5V0UD
On-chip
peripheral I/O
On-chip peripheral I/O bus
DMA source address
register (DSAnH/DSAnL)
control
DMA destination address
register (DDAnH/DDAnL)
DMA transfer count
register (DBCn)
DMA channel control
register (DCHCn)
DMA addressing control
register (DADCn)
DMA disable status
register (DDIS)
DMA restart register (DRST)
DMA trigger factor
register (DTFRn)
DMAC
V850E/IA2