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(2) Capture/compare registers 30 and 31 (CC30 and CC31)
These capture/compare registers 30 and 31 are 16-bit registers.
They can be used as capture registers or compare registers according to the CMS1 and CMS0 bit
specifications of timer control register 31 (TMC31).
These registers can be read/written in 16-bit units (however, write operations can only be performed in
compare mode).
Caution Continuous reading of CC3n is prohibited. If CC3n is continuously read, the second read
value may differ from the actual value. If CC3n must be read twice, be sure to read another
register between the first and the second read operation.
Correct usage example
CC30 read
CC31 read
CC30 read
CC31 read
15
14 13 12
CC30
15
14 13 12
CC31
(a) Setting these registers to capture registers (CMS1 and CMS0 of TMC31 = 0)
When these registers are set to capture registers, the valid edges of the corresponding external interrupt
signals INTP30 and INTP31 are detected as capture triggers. The timer TM3 is synchronized with the
capture trigger, and the value of TM3 is latched in the CC30 and CC31 registers (capture operation).
The valid edge of the INTP30 pin is specified (rising, falling, or both edges) according to the IES301 and
IES300 bits of the SESC register, and the valid edge of the INTP31 pin is specified according to the
IES311 and IES310 bits of the SESC register.
The capture operation is performed asynchronously to the count clock. The latched value is held in the
capture register until the next capture operation is performed.
When the TM3CAE bit of timer control register 30 (TMC30) is 0, 0000H is read.
If these registers are specified as capture registers, an interrupt is generated by detecting the valid edge
of the INTP30 and INTP31 signals.
Caution If the capture operation and the TM3 register count prohibit setting (TM3CE bit of
TMC30 register = 0) timings conflict, the captured data becomes undefined, and no
INTCC3n interrupt is generated (n = 0, 1).
CHAPTER 9 TIMER/COUNTER FUNCTION
11 10
9
8
7
6
11 10
9
8
7
6
User's Manual U15195EJ5V0UD
Incorrect usage example
CC30 read
CC30 read
CC31 read
CC31 read
5
4
3
2
1
0
5
4
3
2
1
0
Address
After reset
FFFFF682H
0000H
Address
After reset
FFFFF684H
0000H
371
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