Non-Maskable Interrupt - NEC PD703114 User Manual

7.2 Non-Maskable Interrupt

A non-maskable interrupt request is acknowledged unconditionally, even when interrupts are in the interrupt
disabled (DI) status. An NMI is not subject to priority control and takes precedence over all the other interrupts.
A non-maskable interrupt request is input from the NMI pin. When the valid edge specified by bit 0 (ESN0) of the
external interrupt mode register 0 (INTM0) is detected on the NMI pin, the interrupt occurs.
While the service program of the non-maskable interrupt is being executed, the acknowledgment of another non-
maskable interrupt request is held pending. The pending NMI is acknowledged after the original service program of
the non-maskable interrupt under execution has been terminated (by the RETI instruction). Note that if two or more
NMI requests are input during the execution of the service program for an NMI, the number of NMIs that will be
acknowledged after the RETI instruction has been executed is only one.
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CHAPTER 7 INTERRUPT/EXCEPTION PROCESSING FUNCTION
User's Manual U15195EJ5V0UD