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CHAPTER 6 DMA FUNCTIONS (DMA CONTROLLER)
The V850E/IA2 includes a direct memory access (DMA) controller (DMAC) that executes and controls DMA
transfer.
The DMAC controls data transfer between memory and peripheral I/O, between memories or between peripheral
I/Os, based on DMA requests issued by the on-chip peripheral I/O (serial interface, timer/counter, and A/D converter),
or software triggers (memory refers to internal RAM or external memory).
6.1 Features
• Four independent DMA channels
• Transfer unit: 8/16 bits
• Maximum transfer count: 65,536 (2
• Two-cycle transfer
• Three transfer modes
• Single transfer mode
• Single-step transfer mode
• Block transfer mode
• Transfer requests
• Request by interrupts from on-chip peripheral I/O (serial interface, timer/counter, A/D converter)
• Requests by software trigger
• Transfer targets
• Memory ↔ peripheral I/O
• Memory ↔ memory
• Peripheral I/O ↔ peripheral I/O
• Next address setting function
16
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User's Manual U15195EJ5V0UD
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