NEC PD703114 User Manual page 237

Next, an example of the operation timing, which depends on the values set to CM0n0 to CM0n2, CM0n4, and
CM0n5 (BFCMn0 to BFCMn2, BFCMn4, BFCMn5) is shown.
(a) When CM0nx (BFCMnx) ≥ CM0n3 is set
Figure 9-17. Operation Timing in PWM Mode 0 (Symmetric Triangular Wave, BFCMnx ≥ CM0n3) (1/2)
(a) Operation timing of compare registers 0n0 to 0n2 (CM0n0 to CM0n2)
count value
BFCMnx
CM0nx
Interrupt request
DTMnx
Positive phase
(TO0n0, TO0n2, TO0n4)
Negative phase
(TO0n1, TO0n3, TO0n5)
Remarks 1. n = 0, 1
2. x = 0 to 2
3. t: Dead time = (DTRRn + 1)/f
4. The above figure shows an active-high case.
5. INTCM01x is generated on a match between TM01 and CM01x (a in the above figure).
INTCM00x is not generated.
CHAPTER 9 TIMER/COUNTER FUNCTION
CM0n3
a
TM0n
0000H
CM0nx CM0nx
match match
BFCMnx ≥ CM0n3
a
a
INTCM0n3
INTCM01x INTCM01x
F/F
t
(f : Base clock)
CLK CLK
User's Manual U15195EJ5V0UD
CM0n3
a
CM0nx match
(BFCMnx = CM0n3)
BFCMnx ≥ CM0n3
BFCMnx ≥ CM0n3
INTTM0n INTCM0n3
INTCM01x
(BFCM1x = CM013)
t
INTTM0n
237